1. Field of the Invention
The present invention relates to a capacitor and, specifically, it relates to a thin layer capacitor element comprising a capacitor formed on a substrate, such as a semiconductor substrate, by a thin layer fabrication process. More particularly, the present invention relates to a thin layer capacitor element provided with a barrier layer, between a capacitor and a protective insulating layer, to inhibit a reduction of the metal oxide dielectric layer by moisture from the protective insulating layer. Further, the present invention relates to a thin layer capacitor element provided with an improved protective insulating layer to prevent absorption of water or moisture from the external environment while also preventing deterioration of electrical characteristics and short-circuits between electrodes. Furthermore, the present invention relates to a production process for the thin layer capacitor elements and to an electronic device having,mounted thereon the thin layer capacitor element of the invention.
2. Description of Related Art
Recently, the increased processing speeds of LSIs have led to the development of decouple processing as a strategy for preventing diffusion of high-frequency noise, as well as a demand for an improved high-frequency tracking performance of the decoupling capacitors used therefor.
To achieve improved high-frequency tracking performance of decoupling capacitors, the decoupling capacitors must have characteristics such as high capacitance and low impedance connections in distributed circuits, and it is known that this requirement can be achieved by forming thin layer capacitors on a semiconductor substrate by a thin layer fabrication process. This is because the thin layer fabrication process allows microprocessing for the purpose of achieving lower inductance capacitors and to reduce the thicknesses of dielectric layers to increase the capacitance.
Thin layer capacitors are produced by a thin layer process in which a metal or metal oxide is deposited on a supporting substrate such as a silicon substrate. In order to realize large-capacitance capacitors, dielectric layers are formed using composite oxide dielectric materials having high dielectric constants. Also, precious metals such as platinum (Pt) or iridium (Ir) are used as the electrode materials for formation of electrode layers. This is because such electrode materials have excellent oxidation resistance suitable for the relatively high-temperature environments utilized for dielectric layer formation, while also allowing control of the crystal orientation of the dielectric materials.
Because the thin layer capacitors are miniature, have large capacities and are excellently suited for microprocessing, they allow connections with circuit boards to be formed as bump connections with narrow pitches between terminals, thereby reducing mutual inductance and making possible effective functioning for low-inductance connections with LSIs. However, as the miniature size and the large capacity of a thin layer capacitor is achieved by using a metal oxide as the dielectric material, the metal oxide undergoes reduction during the fabrication process and thereby produces deterioration in the characteristics.
In order to solve this problem of deterioration of dielectric materials, the following has been proposed, for example, in Japanese Unexamined Patent Publication (Kokai) No. 2000-49311.
FIGS. 1A to 1H show, in sequence, the production steps of a conventional production process of a thin layer capacitor described in the aforementioned patent publication.
First, as shown in FIGS. 1A and 1B, a lower electrode 2 made of platinum (Pt) is formed on a semiconductor substrate 1. Then, as shown in FIGS. 1C and 1D, a capacitive insulating layer 3 made of an insulating metal oxide and an upper electrode 4 made of platinum (Pt) are deposited thereover in that order.
This is followed by the etching step shown in FIG. 1E, and then, as shown in FIG. 1F, a protective insulating layer 6 is deposited on the upper electrode 4 so as to completely cover the upper electrode 4.
Next follows a resist mask-forming step for formation of a resist mask 9, as shown in FIG. 1G, and finally contact holes 9 are formed as shown in FIG. 1H through a dry etching step (not shown).
In the capacitor element produced upon the above process, the problem of reduction of the capacitive insulating layer due to hydrogen generated in the step of removing the resist mask 10 is prevented by such means as limiting the open area of the contact holes 9 of the protective insulating layer 6 to not more than 5 μm2.
In the conventional thin layer capacitor described above with reference to FIGS. 1A to 1H, reduction of the insulating metal oxide of the capacitive insulating layer 3 is prevented by blocking it with a protective insulating layer 6. However, the thin layer capacitor generally employs bumps or similar high-precision packing-enabling connection forms for the terminals to thereby realize low inductance.
With this type of connection form, the mechanical stress generated by the difference in thermal expansion coefficients of the thin layer capacitor and the circuit board on which the thin layer capacitor is mounted can directly bear on the thin layer capacitor terminals, without being mediated by a buffer material such as a lead.
An internal capacitor composed of an extremely thin layer easily tends to undergo a problem such as interlayer peeling due to the aforementioned mechanical stress and, in order to avoid this problem, it is essential to use as the protective insulating layer a resin material such as polyimide which absorbs the mechanical stress from bumps, etc.
Such a solution, however, results in the following new problems.
As the first problem, there is the problem of reduction of the dielectric material in the step of forming the protective insulating layer. For example, a polyimide resin varnish forms a polyimide resin when cured at about 400° C. but, as the acid anhydride and diamine undergo dehydrating condensation polymerization to generate H2O during curing of the polyimide varnish as the protective insulating layer, the H2O decomposes to hydrogen ions and the hydrogen ions reach the dielectric material, thereupon reducing it.
This occurs because the H2O infiltrates the capacitor electrodes in a hydrogen ion state due to the catalytic effect of the platinum Pt composing the electrodes, and the hydrogen ions reach the interface between the electrodes and the dielectric material by diffusion, thereby resulting in oxygen loss of the dielectric material.
The second problem is a problem which occurs during actual use in the field, though this is not a problem of the production steps illustrated in the prior art process.
This problem occurs due to the moisture absorption property of the resin material whereby, due to the high temperature surrounding the thin layer capacitor, moisture in the air absorbed by the polyimide resin migrates to the internal capacitor at a high temperature and reduces the dielectric material.
In addition to the above problems, the conventional production processes suffer from other problems.
For conventional production processes, the thin layer capacitor elements, as are well known, are produced by forming a lower electrode layer, a dielectric layer and an upper electrode layer in that order on a silicon substrate. Further, assuming that flip chip connections created with solder bumps are applied, it is common to first form a capacitor structure comprising a lower electrode layer, a dielectric layer and an upper electrode layer, and then form solder bumps for electrical connections between the upper electrode layer and lower electrode layer. Another common practice is to employ an organic resin material such as a photosensitive polyimide to form a protective insulating layer for the capacitor structure, prior to the bump-forming step.
In the bump-forming step, contact holes are formed in the protective insulating layer in a predetermined pattern, and then a barrier metal such as Cr, Ti, Cu or Ni is applied to cover the inner walls of the contact holes in order to improve the solder wettability and to prevent diffusion of solder to the underlying metal (capacitor electrode) due to the heat in this step and prevent the reaction which results from such diffusion. A layer is then formed by plating of a metal material (for example, Cu) which serves the role as a connection plug for the upper electrode layer and lower electrode layer. Finally, a solder layer is formed by plating to form the desired solder bumps. Here, the resin material for the insulating protective layer also functions as a buffer layer against the electrodes, in order to alleviate the stress of the barrier metal which propagates to the capacitor electrodes.
However, thin layer capacitor elements produced in this manner are often exposed to a reducing atmosphere in the solder reflow step or undergo absorption of water or moisture from the external environment, leading to problems such as deterioration of the electrical characteristics of the dielectric substance and short-circuiting between the upper electrode layer and lower electrode layer. Particularly when platinum (Pt) is used as the electrode material, Pt readily allows penetration of hydrogen, a problem which is exacerbated by generation of hydrogen due to the catalytic effect on water.
Methods have already been proposed for avoiding the problems described above. In the case of FRAM (Ferroelectric Random Access Memory), for example, it has been proposed to cover the capacitor surface with a thin layer of an aluminum, silicon or titanium nitride as a protective layer to prevent penetration and diffusion of reducing gases such as hydrogen (see, Japanese Unexamined Patent Publication (Kokai) No. 7-111318). Another proposed solution has been to use organometallic compounds (silicon alkoxides) that react with water and harden, as protective layers to prevent deterioration of characteristics by water absorption (see, Japanese Unexamined Patent Publication (Kokai) No. 7-273297).
The prior art protective layers mentioned above have been effective for capacitor elements incorporated into semiconductor devices such as FRAMs, but in cases where flip chip connections are created with solder bumps as stand-alone capacitors, no alleviation in the stress from the solder bumps can be expected and therefore it has not been possible to completely eliminate the problem of deterioration in the characteristics.
On the other hand, for thin layer capacitor elements having structures which allow flip chip connections, it has also been proposed to use organic resin materials such as photosensitive polyimide resins as protective layers (see, Japanese Unexamined Patent Publication (Kokai) No. 2002-280261). However, with photosensitive polyimide resins, the acid anhydride and diamine undergo dehydrating condensation polymerization during thermosetting, thereby generating water. Specifically, the polyimide precursor used as the starting substance comprises an acid anhydride and diamine which form polyamic acid, as represented by the following chemical formula, for example.

Moreover, polyimide precursors are generally sold in the state of liquid (varnish) comprising polyimide precursors dissolved in a solvent. The varnish is applied onto the substrate by spin coating or the like to form the protective layer. The resulting coating of the polyimide precursor is then heated at a temperature of, for example, 350 to 400° C. for thermosetting. The thermosetting reaction induces dehydrating condensation polymerization between the acid anhydride and diamine, resulting in ring closure reaction and release of water (H2O), during formation of a thermoset polyimide represented by the following formula.

However, the water generated by the above protective layer-forming reaction can cause a major problem in that it impairs the characteristics of the obtained thin layer capacitor element. This occurs because the water released during the protective layer formation is able to contact the electrode layer (for example, Pt) which is formed adjacent to the protective layer. When water contacts the electrode layer, the catalytic effect of the Pt promotes infiltration of the hydrogen atoms of the water into the electrode layer, producing an oxygen deficiency in the dielectric oxide at the interface between the dielectric layer and the electrode layer. This oxygen deficiency can have a major influence on the dielectric and leak current characteristics of the thin layer capacitor element. FIGS. 2 and 3 are graphs illustrating such problems as occur when using a photosensitive polyimide resin as a protective layer of the thin layer capacitor, and they plot the C-V (electrostatic capacitance—applied voltage) characteristic curve and D-V (dielectric loss—applied voltage) characteristic curve, before and after formation of the protective layer with the photosensitive polyimide resin, respectively. In each of the graphs, curve I is the characteristic curve before formation of the polyimide resin-based protective layer, and curve II is the curve after formation of the polyimide resin-based protective layer. The thin layer capacitor elements produced for evaluation of the characteristics were obtained by forming the lower electrode layer and upper electrode layer both from platinum (Pt) according to conventional methods and forming the dielectric layer of a dielectric oxide (Ba,Sr)TiO3 (hereinafter also referred to as BST), on a silicon substrate. The polyimide protective layer was formed by spin coating a photosensitive polyimide resin varnish for 30 seconds at 3,000 rpm, for example, at a thickness of 4 μm. The polyimide resin coating was then heated (prebaked) for 10 minutes at a temperature of 60° C. and then subjected to exposure and developing steps and heated (main baking) for 2 hours at a temperature of 400° C. This produced a 2 μm thick polyimide resin-based protective insulating layer. As seen in FIGS. 2 and 3, after forming the protective layer of the polyimide resin, an obvious abnormality in the characteristic was observed due to changes in the dielectric oxide, and the dielectric loss increased.